stamps make nanotech devices
Technology Research News
Chipmaking is essentially a two-dimensional
process. Building three-dimensional structures on chips usually requires
a carefully orchestrated sequence of adding and subtracting layers using
Researchers at Princeton University have developed a technique that reduces
the number of steps needed to build structures on chips. The technique
also allows them to make smaller components.
The nanoimprint lithography technique uses stamps made by electron beam
lithography to mass-produce chip structures. Photolithography
uses light shone through masks to imprint patterns on a surface. Electron
beam lithography uses narrow beams of electrons to draw patterns on a
Although electron beam lithography is slow and expensive, once a stamp
is made it can be used to rapidly and cheaply produce many structures.
Also, the stamps can have features as small as a few nanometers across.
Photolithography has a theoretical feature size limit of half the wavelength
of the light used, making it difficult to use photolithography to make
structures smaller than 100 nanometers.
To build a three-dimensional structure, the researchers first make a silicon
oxide stamp in the shape of the structure. They press the stamp into a
layer of plastic to create a mold and then fill the mold with metal. They
then dissolve the surrounding plastic to free the metal structure.
The researchers have used the technique to make T-gates and air bridges,
which are three-dimensional parts commonly used in microwave integrated
circuits. Microwave circuits are at the heart of many communications devices,
including cell phones.
The technique gives manufacturers a way to make smaller T-gates, which
have smaller capacitance, shorter electron transit time and smaller gate
resistance, said Mingtao Li, a graduate student at Princeton.
Nanoimprint lithography could also be used to mass-produce nanoelectromechanical
systems, Li said. Microectromechanical
systems (MEMS), which are currently produced using photolithography,
are used in sensors and communications devices. "Many MEMS structures
can be scaled down to [the] nanoscale if obvious advantages exist," he
Nanoimprint lithography could be used in manufacturing within five years,
Li's research colleagues were Lei Chen and Stephen Y. Chou. They published
the research in the May 21, 2001 issue of the journal Applied Physics
Letters. The research was funded by the Defense Advanced Research Projects
Agency (DARPA) and the Office of Naval Research (ONR).
Timeline: 5 years
TRN Categories: Nanotechnology; Integrated Circuits
Story Type: News
Related Elements: Technical paper, "Direct three-dimensional
patterning using nanoimprint lithography," Applied Physics Letters, May
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